1. Field of the Invention
Embodiments of the present invention relate generally to image sensors, pixels, methods of using image sensors and pixels, and methods of manufacturing image sensors and pixels.
2. Related Art
Image sensors typically sense light by converting impinging photons into electrons that are integrated (collected) in sensor pixels. After completion of an integration cycle in an image sensor, collected charge is usually converted into voltages that are supplied to output terminals of the image sensor. In Complementary Metal-Oxide Semiconductor (CMOS) image sensors, the charge to voltage conversion is typically accomplished directly in the pixels themselves and the analog pixel voltages are transferred to output terminals using various pixel addressing and scanning schemes. In some image sensors, the analog pixel voltage signals are converted on-chip to digital equivalents before reaching the image sensor output terminals.
The pixels in some image sensors have incorporated in them a buffer amplifier, which is typically a Source Follower (SF) that drives corresponding sense lines that are connected to the pixels by suitable addressing transistors. In some designs, the SF itself may also be used in an addressing function and the addressing transistors can be eliminated. In some types of pixels, after charge to voltage conversion is completed and the resulting signals have been transferred out from the pixels, the pixels are reset in order to be ready for accumulation of new charge. In some pixels that use a Floating Diffusion (FD) as a charge detection node, the reset is accomplished by momentarily turning on a reset transistor that conductively connects the FD to a voltage reference, which is typically the pixel drain node. That reset step removes collected charge, but it generates kTC-reset noise as is well known in the art. In some image sensors, kTC-reset noise is at least partially removed from the signals by a Correlated Double Sampling (CDS) signal processing technique in order to achieve a desired low noise performance. The typical CMOS image sensors that utilize the CDS concept usually require at least three transistors or four transistors (4T) in the pixel. An example of a 4T pixel circuit with a pinned photodiode can be found in U.S. Pat. No. 5,625,210 by Lee et al., issued Apr. 29, 1997, the entire content of which is incorporated by reference herein.
In modern CMOS image sensor designs, the circuitry for several photo-diodes may be shared as can be found, for example, in U.S. Pat. No. 6,657,665 by Guidash, issued Dec. 2, 2003, the entire content of which is incorporated by reference herein. In the Guidash patent, the pixel consists of two photo-diodes located in neighboring rows that share some circuitry. Such a shared circuit concept can result in having fewer metal bus lines in the row direction and column direction per photo-diode. The circuit sharing is very useful for designing small pixels or pixels with high Fill Factor (FF) since the spacing and the width of the metal lines essentially determines the minimum pixel size.
In some standard CMOS image sensors, the pixel scanning after charge has been accumulated in the pixels is performed in a sequential manner row by row. This generates an exposure time skew, which can be observed in pictures of moving objects, and which can cause an undesirable picture distortion. This method of CMOS image sensor scanning is called the “rolling shutter” mode. In most applications, however, it is preferable to expose all the pixels of an image sensor at the same time without the skew and thus eliminate the distortion of moving objects. This type of image sensor operation is called the “global shutter” mode. In order to implement this kind of global shuttering, another charge storage site is provided in the pixels. After charge is integrated in the photodiodes of the pixels, it is transferred to the pixel storage sites simultaneously in all the pixels of the pixel array where it can wait for the scanning in the row by row fashion. The pixel scanning time skew is thus independent of the frame pixel exposure time. Various methods for incorporating additional charge storage sites into CMOS image sensor pixels have required that the additional charge storage sites be shielded from impinging light.
In earlier CMOS image sensor shutter pixels, the photodiode and the storage node were implemented as diffusion regions in a semiconductor substrate. An example of such a pixel is described in U.S. Pat. No. 7,388,239 by Fossum et al. titled “Frame Shutter Pixel with an Isolated Storage Node,” issued Jun. 17, 2008, the entire content of which is incorporated by reference herein. These pixels suffer from kTC noise of both photodiode capacitance and storage node capacitance.
The second generation of CMOS global shutter pixels had the photodiode implemented as a pinned photodiode. An example of such a pixel is described in N. Bock et al., “A Wide-VGA CMOS Image Sensor with Global Shutter and Extended Dynamic Range,” Proc. of IEEE Workshop on CCDs and AIS, Karuizawa, 2005, pp. 222-225, the entire content of which is incorporated by reference herein. This pixel is often referred to as a “5T global shutter pixel.” Because of a full charge transfer from the photodiode, there is no kTC noise associated with the photodiode. However, the kTC noise at the storage node remains.
A disclosure of a CMOS image sensor implementation with a global shutter pixel having in-pixel CDS was a further adoption of the well-known Interline Transfer Charge-Coupled Device (CCD) concept and it is described in U.S. Pat. No. 7,361,877 by McGrath et al. titled “Pinned-Photodiode Pixel with Global Shutter,” issued Apr. 22, 2008, the entire content of which is incorporated by reference herein and which is hereinafter referred to as the “McGrath '877 patent”. The global shutter pixel in the McGrath '877 patent has a pinned diode as a detector and also as a storage node.
The McGrath '877 patent shows a simplified cross section of a pixel of a CMOS image sensor that has global shuttering capability. The pinned photodiode photodetector is made of a surface p+ pinning layer and a buried N doped layer. The storage node is made using a pinning p+ implant and a buried N doped implant. The storage node is placed in a P doped shielded well. The photodiode can be emptied and fully reset via an overflow gate (Gov) (which may also be called an Anti-Blooming gate), and this gate may control the exposure time. After the charge integration in the photodiode is completed, charge is transferred via a transfer gate transistor into a second pined photodiode where it waits for scanning. The charge transfer from the first to the second pinned diode is completed in a CCD fashion without generating any kTC noise. It is necessary that the charge storage pinned diode is well shielded from impinging photons with a metal shield to prevent undesirable smear effects when objects in a scene move.
In the McGrath '877 patent, the signal charge readout from the second pinned diode proceeds in the standard way by first resetting a sense node (which may also be called a Floating Diffusion) to a drain bias voltage by momentarily turning on a reset transistor followed by pulsing a charge transfer transistor gate. During a charge integration time, an anti-blooming reset gate bias is adjusted such that, for the pixels with maximum illumination, charge overflows the barrier and flows into a drain, thus preventing spreading of charge into the neighboring pixels. The pixel readout sequence in this device proceeds in a sequential order row by row. The signal appearing of the floating diffusion is buffered by a standard source follower transistor. For the pixel with the pinned photodiode and the pinned diode storage node to function properly, it is necessary that the second pinned photodiode has a higher pinning voltage or that the transfer gate has a potential barrier and a well incorporated in it, as described in an article by Yasutomi et al. titled “A 2.7e− Temporal Noise 99.7% Shutter Efficiency 92 dB Dynamic Range CMOS Image Sensor with Dual Global Shutter Pixels,” IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010, pp. 398-399, the entire content of which is incorporated by reference herein.
Using pinned diodes for charge storage is advantageous since it is well known that these diodes have a low dark current generation. High dark current in storage sites would add to noise and would also generate undesirable shading effects in pictures that would have to be compensated for. Unfortunately, a second pinned diode consumes a significant valuable pixel area, thus increasing the size of the image sensor and ultimately its cost. This concept also consumes a larger amount of the voltage budget that is available for the pixel operation. Moreover, a standard transfer gate has a problem of large dark current generation at the interface between the silicon and silicon-dioxide, which may degrade image sensor performance.